A 10-mW 435-MHz differential CMOS LNA for low-IF receivers in space applications

A low-power 435-MHz differential low-noise amplifier with on-chip spiral inductors was implemented in a 0.5-μm standard CMOS process. The LNA is intended for use in a low-power low-IF receiver under development for deep space communication. Current reuse technique is employed for lowpower operation. Low-noise layout techniques are used to improve the noise performance. Design trade-offs to achieve low-power and low-noise at UHF frequencies are addressed. LNA has a noise figure of 0.94 dB, input 1-dB compression point of –32 dBm, input third-order intercept point of –27 dBm and, forward gain of 25 dB. Active area of the LNA is 1.3 mm x 1.1 mm.